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Thermal stress characteristics and impact on device keep-out zone for 3-D ICs containing through-silicon-vias

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8 Author(s)
Tengfei Jiang ; Microelectron. Res. Center, Univ. of Texas, Austin, TX, USA ; Suk-Kyu Ryu ; Zhao, Qiu ; Im, Jay
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Thermal stresses in TSV structures have been measured using micro-Raman spectroscopy and precision wafer curvature technique as a function of temperature and during thermal cycling. The results were verified by finite element analysis (FEA) to characterize the thermal stress behavior of the TSV structures. A nonlinear stress relaxation was observed during initial heating and no preferred grain orientation was found, indicating a homogeneous Cu grain structure with no pronounced elastic anisotropy. The stress impact on the keep-out zone (KOZ) for devices near the TSVs was investigated.

Published in:

VLSI Technology (VLSIT), 2012 Symposium on

Date of Conference:

12-14 June 2012