A CMOS highly linear low-noise amplifier for Digital TV applications

This paper presents a highly linear low-noise amplifier (LNA) for Digital TV applications. By including a second-order nonlinear cancelling transistor to the noise cancelling circuit, the proposed LNA achieves high IIP3 which is immune to the offset frequency of two tone signals. The proposed LNA is implemented as a differential architecture in 0.13 µm CMOS technology, and measurements show +17.8 dBm, 12.4 dB and 1.6 dB of IIP
3
, gain and NF, respectively, while drawing 18.45 mA from 1.2 V.