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A CMOS highly linear low-noise amplifier for Digital TV applications

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5 Author(s)
Jeong-Yeol Bae ; Dept. of Electr. Eng., KAIST, Daejeon, South Korea ; Suna Kim ; In-Young Lee ; Cartwright, J.
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This paper presents a highly linear low-noise amplifier (LNA) for Digital TV applications. By including a second-order nonlinear cancelling transistor to the noise cancelling circuit, the proposed LNA achieves high IIP3 which is immune to the offset frequency of two tone signals. The proposed LNA is implemented as a differential architecture in 0.13 μm CMOS technology, and measurements show +17.8 dBm, 12.4 dB and 1.6 dB of IIP3, gain and NF, respectively, while drawing 18.45 mA from 1.2 V.

Published in:

Radio Frequency Integrated Circuits Symposium (RFIC), 2012 IEEE

Date of Conference:

17-19 June 2012