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PADE: A high-performance placer with automatic datapath extraction and evaluation through high-dimensional data learning

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3 Author(s)
Ward, S. ; ECE Dept., Univ. of Texas at Austin, Austin, TX, USA ; Duo Ding ; Pan, D.Z.

This work presents PADE, a new placement flow with automatic datapath extraction and evaluation. PADE applies novel data learning techniques to train, predict, and evaluate potential datapaths using high-dimensional data such as netlist symmetrical structures, initial placement hints and relative area. Extracted datapaths are mapped to bit-stack structures that are aligned and simultaneously placed with the random logic using SAPT [1], the SAPT, a placer built on top of SimPL [2]. Results show at least 7% average total Half-Perimeter Wire Length (HPWL) and 12% Steiner Wire Length (StWL) improvements on industrial hybrid benchmarks and at least 2% average total HPWL and 3% StWL improvements on ISPD 2005 contest benchmarks. To the best of our knowledge, this is the first attempt to link data learning, datapath extraction with evaluation, and placement and has the tremendous potential for pushing placement state-of-the-art for modern circuits which have datapath and random logics.

Published in:
Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE

Date of Conference: 3-7 June 2012

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