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VHDL models supporting a system-level design process: a RASSP approach

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3 Author(s)
Debardelaben, J.A. ; Center for Signal & Image Process., Georgia Inst. of Technol., Atlanta, GA, USA ; Madisetti, V.K. ; Gadient, A.J.

The successful Rapid Prototyping of Application-Specific Signal Processors (RASSP) program of the US Department of Defense (DARPA and Tri-Services) targets a 4× improvement in cost and cycle time for design, prototyping, manufacturing, and support processes (relative to current practice). We describe a RASSP-based virtual prototyping process which incorporates parametric cost modeling into a hardware-less VHDL co-simulation and co-verification environment for rapid prototyping. We demonstrate this VHDL-based approach by applying it to the design of a synthetic aperture radar (SAR) system. We present quantitative estimates of the improvements in prototyping time and cost

Published in:

VHDL International Users' Forum, 1997. Proceedings

Date of Conference:

19-22, Oct 1997