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A Compact Rail-to-Rail Class-AB CMOS Buffer With Slew-Rate Enhancement

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4 Author(s)
Chutham Sawigun ; Department of Electronic Engineering, Mahanakorn University of Technology, Bangkok, Thailand ; Andreas Demosthenous ; Xiao Liu ; Wouter A. Serdijn

Two prior-art transconductance amplifier-based rail-to-rail class-AB analog buffers are examined. Their analysis reveals that the output current drive capability for large input voltages is restricted. To mitigate this drawback, a relatively simple slew-rate enhancement scheme is proposed. The new scheme allows the buffer's speed to be increased by over 200% with only a very small increase in static power consumption (1.25%) and silicon area (3%). The proposed and the two conventional buffers were fabricated in a 0.35- \mu \hbox {m} CMOS technology for a power supply of 3 V. Measurements verify the superior slew-rate performance of the new buffer for rail-to-rail step responses.

Published in:

IEEE Transactions on Circuits and Systems II: Express Briefs  (Volume:59 ,  Issue: 8 )