To increase the efficiency of on-chip patch and slot antennas, a single-layer superstrate is proposed. An analytical model to calculate the radiation efficiency is presented, and a detailed design approach is described. This antenna was implemented at W-band in the IBM CMOS8RF (0.13 ) process. The measured antenna results in a 3.9% impedance bandwidth, an efficiency of 30%, and a gain of 0.7 dBi at 89 GHz, which agrees well with simulations. The gain improvement with a quarter-wave superstrate is experimentally demonstrated to be 6.4 dB, representing a substantial improvement over traditional on-chip patch and slot antennas.