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This study proposes the modelling and behavioural simulation of a high-speed phased-locked loop for frequency synthesis. The authors consider the second-order active lag-lead as well as the standard feedback approach of loop filter design for the system model. The s-domain transfer functions of the model for both the cases under considerations are derived for its linear analysis, considering its elemental values. Transient behaviour and stability of the model is analysed using behavioural simulations in MATLAB (Version: 7.1) which shows excellent results. Here, the authors discuss in detail the procedure for mathematical derivation of the theoretical model, taking into account both active lag-lead and standard feedback approach for the loop in the PLL model, the various aspects of methodology for simulations and their results.