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Bandwidth-aware test compression logic for SoC designs

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4 Author(s)
Jakub Janicki ; Pozna! University of Technology, 60-965 Poznań, Poland ; Jerzy Tyszer ; Grzegorz Mrugalski ; Janusz Rajski

This paper presents novel methods of enhancing test compression solutions for SoC designs. The ability of the proposed schemes to improve the encoding efficiency, test compression, and test time is accomplished by either appropriate selecting or laying out ATE channel injectors within EDT-based decompressors. The efficacy of new techniques with respect to test bandwidth management is demonstrated by running experiments on several industrial SoC designs and is reported herein.

Published in:

2012 17th IEEE European Test Symposium (ETS)

Date of Conference:

28-31 May 2012