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Testing of Through Silicon Via (TSV) and Micro-Bump (MB) devices by physical connection through the TSVs presents unique challenges due to the very high density of the connections, and the potential impact of contact testing on subsequent assembly steps. In addition, the very high signal counts that are the main benefit of TSV connection schemes make conventional wafer probing, particularly for memory devices which demand very high parallelism at production wafer sort, largely impractical. We present a socket solution using FormFactor Nanopierce™ contactor for direct testing of TSV's and micro-bumps arrays which enables creation of known good TSV dies for high yield stacking and known good TSV stacks for shipment to system assemblers to achieve high yield assembly. Combining this socket solution with existing full wafer contact probe solutions enables a complete TSV test flow. In addition, standard TSV interface designs and patterns can enable standard sockets. The FormFactor NanoPierce™ contactor is highly scalable and easy to fabricate at very dense pitches down to 20μm. The contactor relies on many small contact points within one contact pad and good electrical connection can be achieved at low contact forces with minimal surface damage. We present test result on both Au pads and SnAg bumps performed at 40μm × 50μm pitch array wide I/O JEDEC pattern. The resistance per contact is ~3 Ohms with 25μm overtravel, and an estimated inductance of 0.1nH per contact. Test results show no detectable damage on the contactor, and small damage on 20μm SnAg bumps.
VLSI Test Symposium (VTS), 2012 IEEE 30th
Date of Conference: 23-25 April 2012