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Hardware-Accelerated Simulation Environment for CT Sigma–Delta Modulators Using an FPGA

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6 Author(s)
Bruckner, T. ; Institute of Microelectronics, University of Ulm, Ulm, Germany ; Lorenz, M. ; Zorn, C. ; Becker, J.
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In this brief, a hardware-accelerated simulation environment for continuous-time (CT) $SigmaDelta$ modulators is presented. Due to the presence of the nonlinear quantizer, simulating $SigmaDelta$ modulators is a complicated task in general. The simulation of CT modulators is even more time consuming than that of their discrete-time counterparts, due to the analog loop filter. In particular, in an automated design environment, a large number of simulations have to be performed during the design process of $ SigmaDelta$ modulators. In this brief, it is shown for the first time that the system-level emulation of CT $SigmaDelta$ modulators on an field-programmable gate array results in a significant acceleration, reducing the simulation time by a factor of more than $hbox{10}^{5}$ compared to a commonly used Simulink simulation. This allows simulating 10 000 of modulators per second, enabling the use of heuristic search algorithms for real-time design for CT $SigmaDelta$ modulators.

Published in:

Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:59 ,  Issue: 8 )

Date of Publication:

Aug. 2012

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