Enhancing Hysteresis in Graphene Devices Using Dielectric Screening

A method of increasing hysteresis in graphene devices with a dielectric coating is presented. By controlling the sweep direction of the gate bias, “high-conductance” and “low-conductance” states can be produced by transitioning the device between dielectric screened and unscreened states, which is a fundamentally new approach to producing hysteresis. Moderate carrier densities (4 × 10
¹²
cm
^-2
) result in field-driven injection of charge from the graphene channel into the underlying SiO
₂
substrate, modifying the scattering charged-impurity layout seen by the graphene, ultimately disrupting the steady-state screening process. A stable room-temperature conductance gap of nearly one order of magnitude is demonstrated.