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The effects of source/drain resistance on deep submicrometer device performance

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4 Author(s)
Min-Chie Jeng ; Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA ; Chung, J.E. ; Ko, P.-K. ; Chenming Hu

As MOSFET channel lengths approach the deep-submicrometer regime, performance degradation due to parasitic source/drain resistance (R sd) becomes an important factor to consider in device scaling. The effects of Rsd on the device performance of deep-submicrometer non-LDD (lightly doped drain) n-channel MOSFETs are examined. Reduction in the measured saturation drain current (Rsd=600 Ω-μm) relative to the ideal saturation current (Rsd=0.0 Ω-μm) is about 4% for Leff=0.7 μm and Tox =15.6 nm and 10% for Leff=0.3 μm and T ox=8.6 nm. Reduction of current in the linear regime and reduction of the simulated ring oscillator speed are both about three times higher. The effect of salicide technologies on device performance is discussed. Projections are made of the ultimate achievable performance

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Electron Devices, IEEE Transactions on  (Volume:37 ,  Issue: 11 )