The effects of source/drain resistance on deep submicrometer device performance

As MOSFET channel lengths approach the deep-submicrometer regime, performance degradation due to parasitic source/drain resistance (R/sub sd/) becomes an important factor to consider in device scaling. The effects of R/sub sd/ on the device performance of deep-submicrometer non-LDD (lightly doped drain) n-channel MOSFETs are examined. Reduction in the measured saturation drain current (R/sub sd/=600 Omega - mu m) relative to the ideal saturation current (R/sub sd/=0.0 Omega - mu m) is about 4% for L/sub eff/=0.7 mu m and T/sub ox/=15.6 nm and 10% for L/sub eff/=0.3 mu m and T/sub ox/=8.6 nm. Reduction of current in the linear regime and reduction of the simulated ring oscillator speed are both about three times higher. The effect of salicide technologies on device performance is discussed. Projections are made of the ultimate achievable performance.<
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