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Design and performance measurement of a high-performance computing cluster

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2 Author(s)
George, K. ; Comput. Eng. Program, California State Univ., Fullerton, CA, USA ; Venugopal, V.

Graphics processor units (GPU) are specialized hardware accelerators that can be utilized for computations needing high parallelism and high memory bandwidth. Propelled by the attractive Flops/$ ratio and its capability to outperform a CPU cluster at the equivalent cost, large-scale GPU clusters are gaining popularity in the high-performance computing (HPC) community. However, the design challenges associated with the setup and application development process for an efficient HPC cluster includes: a) data movement and locality on the hardware accelerators; b) task mapping and allocation; and c) setting up a well-balanced system. In this paper, we present our experience setting up a GPU cluster for HPC applications; particularly signal processing for digital wideband receivers. We describe the architecture, hardware and software platform of the proposed cluster. The proposed GPU cluster implementing a 1.25 GHz digital wideband receiver was compared and contrasted against a HPC based predecessor receiver system. The adaptability of the GPU cluster was further demonstrated by utilizing it for a multiple receiver implementation that demanded higher data processing capability and throughput.

Published in:

Instrumentation and Measurement Technology Conference (I2MTC), 2012 IEEE International

Date of Conference:

13-16 May 2012