By Topic

Optimization of polysilicon emitters for BiCMOS transistor design

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
Evans, I.R. ; L.S.I. Logic Ltd., Sidcup, UK ; Morris, N. ; Mole, P.J. ; Quinlan, S.C.
more authors

Practical aspects of designing polysilicon emitters for large-scale integrated circuit manufacture are presented. It is shown that by choosing the emitter dose such that the minimum base saturation current density is observed, the highest product of common emitter gain and Early voltage is obtained. In practice, this allows high values of both parameters to be chosen, giving an increased bipolar output impedance. This reduces the need for elaborate Early voltage compensation during BiCMOS circuit design. In addition, the increase in the integrated base charge gives a reduction in the punched base resistance and hence the bipolar noise figure. The increase in the total base charge permits the use of a deeper, wider base region. Therefore, maximizing the product of common emitter gain and Early voltage gives transistors with optimized performance and improved reproducibility

Published in:

Electron Devices, IEEE Transactions on  (Volume:37 ,  Issue: 11 )