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Implementation of weighted constrained one-bit transformation based fast motion estimation

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1 Author(s)
Sumit K. Chatterjee ; Department of Electronics and Communication Engineering, Asansol Engineering College, Asansol 713104, India

An efficient architecture that implements motion estimation based on a combination of diamond search algorithm and weighted constrained one-bit transformation is presented. The component of any motion estimation hardware that deals with the memory access consumes considerable power. This paper reports efforts at exploiting the overlap of search data among various search locations to reduce the number of memory accesses. The proposed architecture can reduce total power consumption by up to 23% compared to a recently reported architecture. Moreover, only 9 processing elements are used in this architecture, as against 16 processing elements used in conventional one bit transformation based motion estimation hardware. This in turn substantially reduces the total area of the architecture. As the proposed architecture is area efficient in addition to consuming relatively less power, its potential application lies in portable consumer video playback systems typically operated by batteries.

Published in:

IEEE Transactions on Consumer Electronics  (Volume:58 ,  Issue: 2 )