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Subthreshold CMOS voltage reference circuit with body bias compensation for process variation

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5 Author(s)
Luo, H. ; Dept. of ISEE, Zhejiang Univ., Hangzhou, China ; Han, Y. ; Cheung, R.C.C. ; Liang, G.
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This study presents a subthreshold complementary metal oxide semiconductor (CMOS) voltage reference circuit that adopts dynamical body bias to compensate the process-related reference voltage fluctuation. The proposed circuit generates a mean reference voltage of 0.781 V at 1.2 V supply and 27°C, reduces the standard deviation (σ) of the reference voltage from 11 mV to only 3 mV, and meanwhile improves the power supply rejection ratio from -30.7 to -51.4 dB. The average temperature coefficient measured from 0 to 100°C is 48 ppm/°C, and the line regulation is 0.34%/V in a supply voltage ranging from 1.2 to 2.3 V. The maximum supply current is 8.1 μA at 1.2 V supply and 100°C, and the chip area is 0.0533 mm2 in 0.13-μm CMOS technology.

Published in:

Circuits, Devices & Systems, IET  (Volume:6 ,  Issue: 3 )