By Topic

Analytical model for threshold voltage shift due to impurity penetration through a thin gate oxide

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Suzuki, K. ; Fujitsu Labs. Ltd., Atsugi, Japan

We derived an analytical model for the threshold voltage shift due to impurity penetration through gate oxide and evaluated the thermal budget for pMOS devices with a thin gate oxide. The threshold voltage shift decreases as the channel doping concentration increases, but the decrease is quite small. The allowable surface concentration of the penetrated impurity increases as the gate oxide thickness decreases if the allowable threshold voltage shift is constant. Therefore, the allowable diffusion length normalized by the gate oxide thickness dox increases with decreasing dox

Published in:

Electron Devices, IEEE Transactions on  (Volume:44 ,  Issue: 9 )