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Combining loop fusion with prefetching on shared-memory multiprocessors

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1 Author(s)
Manjikian, N. ; Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada

The performance of programs consisting of parallel loops on shared-memory multiprocessors is limited by long memory latencies as processor speeds increase more rapidly than memory speeds. Two complementary techniques for addressing memory latency and improving performance are: (a) cache locality enhancement for latency reduction and (b) data prefetching for latency tolerance. This paper studies the benefit of combining loop fusion for locality enhancement with prefetching. Experimental results are reported for multiprocessors with support for prefetching. For a complete application on an SGI Power Challenge R10000, combining loop fusion with prefetching improves parallel speedup by 46%

Published in:

Parallel Processing, 1997., Proceedings of the 1997 International Conference on

Date of Conference:

11-15 Aug 1997

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