A high-throughput and size-efficient NoC buffer design method

This paper presents a high-throughput and size efficient buffer design method for an application specific NoC. The method firstly configures on chip buffer according with the mapping position of IP and the routing path of communication pairs, then computes the minimum value of buffer's size under NoC performance guarantee. Under the same buffer size, the experiments show that the method results in the 40% improvement of the throughput when compared the common input buffer design method.