By Topic

A 7-Bit 18th Order 9.6 GS/s FIR Up-Sampling Filter for High Data Rate 60-GHz Wireless Transmitters

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

7 Author(s)
Jonathan Muller ; STMicroelectronics, Crolles, France ; Bruno Stefanelli ; Antoine Frappe ; Lu Ye
more authors

This paper presents the design and measurement of a 4 × oversampled 18th order digital low-pass FIR filter. It is a key building block in the proposed digitally enhanced transmitter architecture for 60 GHz wireless high-data rate links. Spectrum mask requirements are fully satisfied for OFDM modulated signals without requiring additional analog filtering. Pipelined CPL adders and TSPC flip-flops are used to enable a very high operation frequency. The core area is 0.1 mm2 in a standard GP 65 nm CMOS process. Measured power consumption is 400 mW at 9.6 GS/s with a 1.4 V power supply voltage.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:47 ,  Issue: 7 )