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Input waveform slope effects in CMOS delays

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4 Author(s)
D. Auvergne ; Lab. d'Autom. et de Microelectron., Montpellier II Univ., France ; N. Azemard ; D. Deschacht ; M. Robert

Slow input ramp effects in delay evaluation on CMOS structures are considered. Corrections of previously defined closed-form equations are proposed, allowing accurate evaluation of delays in a large range of configurations. The expressions obtained remain sufficiently manageable to be used in an automatic data-path sizing tool

Published in:

IEEE Journal of Solid-State Circuits  (Volume:25 ,  Issue: 6 )