By Topic

Efficient memory management techniques to speed up the conventional transient simulation of piecewise linear circuits including power electronics

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Leelarasmee, E. ; Dept. of Electr. Eng., Chulalongkorn Univ., Bangkok, Thailand ; Hwangkhunnatham, M.

The transient simulation of piecewise linear circuits, including power electronics, using traditional simulation algorithms is revised by adding a dynamic memory management technique called LU matrix cache. It makes use of free main memory to store past copies of LU factors for future reuse. This technique can be easily added to a general purpose circuit simulator to increase its execution speed significantly when applied to piecewise linear circuits. Furthermore, a matrix partition technique is presented to reduce the storage requirement of multiple LU factors by storing only parts that change from one iteration to another

Published in:

Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on  (Volume:2 )

Date of Conference:

9-12 Jun 1997