Referenced Items are not available for this document.
Recently, as CMOS devices become smaller, process variation, especially threshold voltage variation, significantly influences circuit characteristics under lower supply voltage. This paper proposes a process variation compensation technique with effective gate-width tuning as well as body biasing.
Published in:
Future of Electron Devices, Kansai (IMFEDK), 2012 IEEE International Meeting for
Date of Conference: 9-11 May 2012
- Page(s):
- 1 - 2
- Print ISBN:
- 978-1-4673-0837-3
- INSPEC Accession Number:
- 12805853
- Conference Location :
- Osaka
- Digital Object Identifier :
- 10.1109/IMFEDK.2012.6218634
- Product Type:
- Conference Publications
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