By Topic

Optimization method for broadband modem FIR filter design using common subexpression elimination

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Pasko, R. ; Fac. of Electr. Eng. & Inf. Technol., Bratislava, Slovakia ; Schaumont, P. ; Derudder, V. ; Durackova, D.

An approach for broadband modem FIR filter design optimization is presented. It addresses the minimization of the number of adder-subtractors used in the hardware implementation of a FIR filter (the multiple constant multiplication problem). The method is based on the identification and elimination of common n-bit pattern subexpressions in a set of filter coefficients by means of an exhaustive search. We give an algorithm description of our solution and demonstrate its performance on selected examples. A comparison of the results obtained by other authors is made, and finally, optimization and synthesis results on a realistic example-a 64-tap root-raised-cosine filter with 10-bit CSD (canonical signed digit) coefficients-are given

Published in:

System Synthesis, 1997. Proceedings., Tenth International Symposium on

Date of Conference:

17-19 Sep 1997