The authors describe a 46 Gbits super-dynamic type decision circuit module that uses InAlAs/InGaAs HEMTs. At a data rate of 40 Gbit/s, the module shows an input data sensitivity of 104 mVpp and a clock phase margin of 212
Published in:
Electronics Letters
(Volume:33
,
Issue:
17
)
Date of Publication: 14 Aug 1997