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An area and time efficient adder for multiple additions with different word-length

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3 Author(s)
Bor-Sung Liang ; Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan ; Nieh, Y.-C. ; Chein-Wei Jen,

To calculate multiple independent additions with different word-lengths by hardware sharing, we propose a new adder architecture in this paper, named self carry routing adder (SCRA). Multiple additions for data with different precision frequently occur in some applications, like DDA operation in 3-D graphics rendering. By segmentation, rearrangement and dynamic carry routing, the SCRA design can effectively decrease the delay time, reduce hardware area, and achieve high hardware utilization

Published in:

Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on  (Volume:3 )

Date of Conference:

9-12 Jun 1997