An area and time efficient adder for multiple additions with different word-length

To calculate multiple independent additions with different word-lengths by hardware sharing, we propose a new adder architecture in this paper, named self carry routing adder (SCRA). Multiple additions for data with different precision frequently occur in some applications, like DDA operation in 3-D graphics rendering. By segmentation, rearrangement and dynamic carry routing, the SCRA design can effectively decrease the delay time, reduce hardware area, and achieve high hardware utilization.