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Programmable design for memory sharing processor array

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2 Author(s)
Dongju Li ; Dept. of Electr. & Electron. Eng., Tokyo Inst. of Technol., Japan ; Kunjeda, H.

Memory sharing processor array (MSPA) architecture has been proposed with advantages of high efficiency parallel processing, less data storage requirement, and high-cost performance. MSPA design methodology has been developed with regular structure and systematic procedure. In this paper, programmable MSPA is proposed. It embeds not only MSPA architecture, but design procedure into silicon chips so that various applications can be performed with high speed

Published in:

Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on  (Volume:3 )

Date of Conference:

9-12 Jun 1997