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Dynamic compression for sampled-data signals in analog integrated CMOS circuits

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3 Author(s)
V. Uhlemann ; Nokia Mobile Phones, Bochum, Germany ; B. J. Hosticka ; R. Klinke

A novel integrated CMOS circuit for signal compression of analog sampled-data signals is presented. It provides charge readout and amplification featuring very high dynamic range, which is useful in applications of capacitive detector arrays or capacitive sensors. The output voltage is proportional to the square-root of the input signal. In this contribution we describe the circuit chip and demonstrate its operation

Published in:

Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on  (Volume:3 )

Date of Conference:

9-12 Jun 1997