Cart (Loading....) | Create Account
Close category search window

Dynamic compression for sampled-data signals in analog integrated CMOS circuits

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Uhlemann, V. ; Nokia Mobile Phones, Bochum, Germany ; Hosticka, Bedrich J. ; Klinke, R.

A novel integrated CMOS circuit for signal compression of analog sampled-data signals is presented. It provides charge readout and amplification featuring very high dynamic range, which is useful in applications of capacitive detector arrays or capacitive sensors. The output voltage is proportional to the square-root of the input signal. In this contribution we describe the circuit chip and demonstrate its operation

Published in:

Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on  (Volume:3 )

Date of Conference:

9-12 Jun 1997

Need Help?

IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.