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In this paper an in-depth study of the behavior of rationally synchronized oscillators (RSO) is presented. The circuit is optimized in order to achieve a broad synchronization bandwidth with low reference signal power through the selection of the adequate harmonic content. The nonlinear dynamics of the RSO is analyzed, focusing on the different bifurcation points which delimit the locking range when high reference signal power is considered. An RSO prototype with rational synchronization ratio r=3/5, autonomous frequency fo=3 GHz and reference signal frequency fr=5 GHz has been manufactured and experimentally characterized, demonstrating a good agreement with simulation results.