Scheduled System Maintenance on May 29th, 2015:
IEEE Xplore will be upgraded between 11:00 AM and 10:00 PM EDT. During this time there may be intermittent impact on performance. For technical support, please contact us at onlinesupport@ieee.org. We apologize for any inconvenience.
By Topic

Research on TSV positioning in 3D IC placement

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Ligang Hou ; VLSI & Syst. Lab., Beijing Univ. of Technol., Beijing, China ; Shu Bai ; Jinhui Wang

This paper forwards two TSV positioning algorithm named middle-cut positioning (MCP) and optimized area positioning (OAP). In 3D IC placement, TSV occupies cell area and its position does affect the real wire length which is ignored in previous works. Its effect should be considered by TSV based wirelength calculation and TSV positioning. Experiments are carried out on 2D-3D transformation of IBM benchmark circuits. Results shows that OAP outrun MCP, which optimized total wirelength in 15 out of 17 benchmark circuits, in which best optimized 11.81%.

Published in:

Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2011 IEEE

Date of Conference:

12-14 Dec. 2011