Sensitivity analysis of through-silicon via (TSV) interconnects for 3-D ICs

Sensitivities of through-Si-via (TSV) interconnects to the process parameters are investigated numerically in this paper. Some important parameters of the coupled interconnects are examined and compared in detail, such as silicon conductivity of the substrate and radii of the TSVs, etc., where MOS effects are treated appropriately. The emerging materials, carbon nanotube (CNT) based TSVs are also included and studied.