By Topic

A tunable CMOS-DRAM voltage limiter with stabilized feedback amplifier

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

10 Author(s)
Horiguchi, M. ; Hitachi Ltd., Tokyo, Japan ; Aoki, M. ; Etoh, Jun ; Tanaka, H.
more authors

The authors present two developments for a CMOS-DRAM voltage limiter: a precise internal-voltage generator, and a stabilized driver composed of a feedback amplifier with compensation. The voltage limiter's features include generating a PMOS-VT difference, being capable of voltage tuning with fuse trimming, and compensation in the driver circuit through zero insertion. It provides a voltage impervious to supply-voltage and substrate-voltage boundings, temperature variation, and process fluctuation, while ensuring the feedback-loop stability with a phase margin of 55° for a time-dependent load of DRAM circuit. The proposed circuits are experimentally evaluated through their implementation in a 16-Mb CMOS DRAM. A temperature dependency of 1.4 mV/°C and a voltage deviation within ±10% for process fluctuation are achieved. The voltage is stabilized within ±3% for VCC bounce and ±10% for memory operation

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:25 ,  Issue: 5 )