A tunable CMOS-DRAM voltage limiter with stabilized feedback amplifier

The authors present two developments for a CMOS-DRAM voltage limiter: a precise internal-voltage generator, and a stabilized driver composed of a feedback amplifier with compensation. The voltage limiter's features include generating a PMOS-V/sub T/ difference, being capable of voltage tuning with fuse trimming, and compensation in the driver circuit through zero insertion. It provides a voltage impervious to supply-voltage and substrate-voltage boundings, temperature variation, and process fluctuation, while ensuring the feedback-loop stability with a phase margin of 55 degrees for a time-dependent load of DRAM circuit. The proposed circuits are experimentally evaluated through their implementation in a 16-Mb CMOS DRAM. A temperature dependency of 1.4 mV/ degrees C and a voltage deviation within +or-10% for process fluctuation are achieved. The voltage is stabilized within +or-3% for V/sub CC/ bounce and +or-10% for memory operation.<
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