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A technology dependent power optimization technique is proposed which formulates the problem of hot spot reduction as a variant of the engineering change (EC) problem. A technique is presented for determining the sensitivity of circuit power dissipation to functional changes considering both local and global effects. This sensitivity is combined with a measure of synthesis flexibility to identify hot regions in the circuit which have a lot of flexibility in making functional changes and for whom a small functional change can greatly affect the overall power dissipation. An incompletely specified target function is constructed for the hot region such that any implementation satisfying it is expected to reduce power. A rewiring algorithm is used to solve the resulting EC problem without affecting circuit area, gate capacitance or delay under the unit delay model. Experimental results on a set of MCNC benchmark circuits show that the proposed approach can give up to 13% reduction in power dissipation with an average reduction of 4%.