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A high density cylinder-type MIM capacitor integrated with advanced 28nm logic High-K/Metal-Gate process for embedded DRAM

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22 Author(s)
Tu, K.C. ; Taiwan Semicond. Manuf. Co., Ltd., Hsinchu, Taiwan ; Wang, C.C. ; Hsieh, Y.T. ; Ting, Y.W.
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A cylinder-type Metal-Insulator-Metal (MIM) capacitor integrated with advanced 28nm logic High-K/Metal-Gate (HKMG) process for embedded DRAM has been developed. The stacked cell capacitor is formed using low temperature high-K dielectrics to achieve sufficient storage capacitance without significantly impacting logic transistors. This paper describes techniques to achieve cylinder-type MIM capacitor's capacitance >;10fF/cell and keep the low leakage (<;0.1fA/cell) requirements. The MIM dielectric reliability test passes Time Dependent Dielectric Breakdown (TDDB) lifetime (>;10 years). The test vehicle is composed of 72 macros of 4.5Mb each. We successfully demonstrate fully functional good yield of 28nm eDRAM 324Mb test vehicle with access speed >;330MHz.

Published in:

VLSI Technology, Systems, and Applications (VLSI-TSA), 2012 International Symposium on

Date of Conference:

23-25 April 2012