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In this brief, a novel all-digital and large-frequency-multiplication-ratio audio frequency synthesizer for high-definition multimedia interface applications is presented. The proposed large- N frequency synthesizer is designed in an all-digital manner to reduce circuit complexity and design efforts in advanced CMOS process technology, as compared with prior studies. The proposed frequency synthesizer does not require an extra high-frequency reference clock source but employs a single locking loop to reduce lock-in time and enhance loop stability. Based on the proposed frequency search algorithm and the high-resolution digitally controlled oscillator, the frequency synthesizer cannot only provide a large frequency multiplication ratio, but it also achieves low-jitter performance. Measurement results show that the frequency multiplication ratio has a range of 4096 to 25 088 and that the power consumption of the proposed frequency synthesizer can be improved to 591 μW (at 24.576 MHz) with a peak-to-peak jitter of 1.23%. In addition, the proposed frequency synthesizer can be implemented with standard cells, making it easily portable to different processes and very suitable for system-on-a-chip applications.