By Topic

Design of a 24 GHz ultra low power current reused CMOS LNA in subthreshold region

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Yasami, S. ; Center for Adv. Comput. Studies, Univ. of Louisiana at Lafayette, Lafayette, LA, USA ; Bayoumi, M.

This paper presents a single-stage ultra-low power low voltage low noise amplifier (LNA) at 24 GHz in commercially available CMOS technology in 90 nm. The LNA has been implemented by using current reused technique with operation biased in subthreshold region to reduce power consumption. The state of art LNA in this work achieves 10 dB power gain (S21), 1.2 dB noise figure (NF), and input-referred third-order intercept point (IIP3) of 12 dB. It consumes significantly low power of only 160 uW from very low voltage power supply of 0.55 V and DC current of 287 uA at 24 GHz.

Published in:

Wireless and Microwave Technology Conference (WAMICON), 2012 IEEE 13th Annual

Date of Conference:

15-17 April 2012