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A digital baseband cognitive radio spectrum sensing processor with 200-kHz resolution over 200-MHz bandwidth is integrated in 1.64 mm2 in 65-nm CMOS. The processor uses adaptive channel-specific threshold and sensing time to achieve detection probability ≥ 0.9 and false-alarm probability ≤ 0.1 for -5-dB SNR and adjacent-band interferers of 30-dB INR within a 50-ms sensing time. The chip power and area are minimized by jointly considering algorithm, architecture, and circuit parameters. The chip dissipates 7.4 mW for a 200-MHz sensing bandwidth, which is a 22× reduction in power per sensing bandwidth compared with prior work.