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Considerations for Ultimate CMOS Scaling

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1 Author(s)
Kuhn, K.J. ; Intel Corp., Hillsboro, OR, USA

This review paper explores considerations for ultimate CMOS transistor scaling. Transistor architectures such as extremely thin silicon-on-insulator and FinFET (and related architectures such as TriGate, Omega-FET, Pi-Gate), as well as nanowire device architectures, are compared and contrasted. Key technology challenges (such as advanced gate stacks, mobility, resistance, and capacitance) shared by all of the architectures will be discussed in relation to recent research results.

Published in:

Electron Devices, IEEE Transactions on  (Volume:59 ,  Issue: 7 )

Date of Publication:

July 2012

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