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With continuous increase of FPGA design's complexity,it becomes more and more difficult to design and debug FPGA,and the time cost is also increasing in the process of design verification. In this paper, GPS IF signal source is designed and realized, and a new idea to verify FPGA complexity design by FPGA development boards is proposed. GPS signal source, based on FPGA design, analyzes data and simulates the verification method by Matlab through ModelSim simulation and 1ms data sampling. It has been shown in the experiment that it can effectively remedy its deficiency by comparing with general ModelSim and SignalTap II simulation.