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A novel phase detection system for linear all-digital phase locked loop

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4 Author(s)
Abhishek Das ; Department of Electronics and Communication Engineering, National Institute of Technology, Rourkela-769008, India ; Suraj Dash ; B. Chitti Babu ; Ajit Kumar Sahoo

In this paper, a novel fast phase detection system for all-digital phase locked loop (ADPLL) is presented. The phase detection system is realized by generating an analytic signal using a compact implementation of Hilbert transform and then simply computing the instantaneous phase. 16-bit CORDIC algorithm is employed in order to obtain the phase information of the signal. All the components used in this phase detection system are realized as digital discrete time components. This design does not involve any class of multipliers thus reducing the complexity of the design. The phase detection system although providing a definite advantage over conventional analog phase detectors, the Hilbert filter implemented in this paper has been designed using a method based on complex, multiplier less sampling filters. A comparison has been drawn between the continuous PLL model's phase detection system and the proposed method for effectiveness of the study. The studied system is modeled and tested in the MATLAB/Simulink environment.

Published in:

Engineering and Systems (SCES), 2012 Students Conference on

Date of Conference:

16-18 March 2012