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A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs

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4 Author(s)
Osaki, Y. ; Dept. of Electr. & Electron. Eng., Kobe Univ., Kobe, Japan ; Hirose, T. ; Kuroki, N. ; Numa, M.

This paper presents a level shifter circuit capable of handling extremely low-voltage inputs. The circuit has a distinctive current generation scheme using a logic error correction circuit that works by detecting the input and output logic levels. The proposed level shifter circuit can convert low-voltage digital input signals into high-voltage digital output signals. The circuit achieves low-power operation because it dissipates operating current only when the input signal changes. Measurement results demonstrated that the circuit can convert a 0.23-V input signal into a 3-V output signal. The power dissipation was 58 nW for a 0.4-V 10-kHz input pulse.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:47 ,  Issue: 7 )