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Degradation-Resilient Design of a Self-Healing xDSL Line Driver in 90 nm CMOS

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2 Author(s)
Pieter De Wit ; Departement of Electrical Engineering (ESAT-MICAS), Katholieke Universiteit Leuven, Leuven, Belgium ; Georges Gielen

Continuous scaling to smaller CMOS nodes has enlarged transistor degradation effects, reducing the long-term reliability of integrated circuits. This paper addresses the reliability of a high-voltage xDSL line driver and uses a failure-resilient topology to combine both optimal performance and guaranteed reliability, as verified by simulations in a predictive 32 nm CMOS technology. In addition, to illustrate the self-healing concept, a failure-resilient line driver with reconfigurable output stage, on-chip degradation monitors and system controller, resulting in a guaranteed power efficiency even in the presence of transistor degradation, has been implemented in 90 nm CMOS. Preservation of the power efficiency is verified experimentally using voltage-overstressing and temperature variation measurements.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:47 ,  Issue: 7 )