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Noise performance analysis of a symmetric tied-gate InAlAs/InGaAs double-gate (DG) high-electron mobility transistor (HEMT) is presented using an accurate charge-control-based noise model. The intrinsic noise coefficients are obtained in terms of which the various noise performance parameters, including, the noise resistance and the Minimum noise figure are evaluated. The effect of the parasitic source and gate resistances has also been incorporated to obtain extrinsic minimum noise figure. The results obtained show improved noise performance of DG-HEMT as compared to the single-gate HEMT in terms of lower minimum noise figure. The analytical results obtained are validated with the ATLAS device simulation results as well as with the experimental and Monte Carlo simulation data.