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An efficient modified lifting based 2-D discrete wavelet transform architecture

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2 Author(s)
Vidyadhar Gupta ; Department of Electronics Engineering, Harcourt Butler Technological Institute, Kanpur (U P), India ; Krishna Raj

In this paper, we present an efficient and modified lifting based architecture for 2-D lifting-based DWT in JPEG2000 applications. The Proposed 2-D DWT architecture is composed of one 1-D DWT cores and transposing register array. The proposed 1-D DWT core consumes two input data and produces two output coefficients per cycle, and its critical path takes one multiplier delay only. The Proposed architecture is efficient in terms of hardware utilization; here we use one 1-D DWT cores in time multiplexed manner to perform 2-D discrete wavelet transform. Moreover, we utilize a modified lifting scheme to merge the Predictor and Updater stages into a single stage. The simulation result is shown through the MATLAB (7.8.0).

Published in:

Recent Advances in Information Technology (RAIT), 2012 1st International Conference on

Date of Conference:

15-17 March 2012