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Efficient implementation of Advanced Encryption Standard (AES) for ARM based platforms

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2 Author(s)
Mohit Kumar ; University School of Information Technology, Guru Gobind Singh Indraprastha University, New Delhi, India ; Apoorva Singhal

Now a days, hi-tech secure products need more services and more security. Furthermore, the corresponding market is now oriented towards more flexibility. In this paper, we have implemented Advanced Encryption Algorithm for ARM based platforms. The Advanced Encryption Standard (AES) contest, started by the U.S. National Institute of Standards and Technology (NIST), saw the Rijndael algorithm as its winner. AES has a fixed block size of 128 bits and a key size of 128, 192 or 256 bits, whereas Rijndael can be specified with key and block sizes in any multiple of 32 bits, with a minimum of 128 bits and a maximum of 256 bits. Although the AES is fully defined in terms of functionality, it requires best exploitation of architectural parameters in order to reach the optimum performance on specific architectures. Our work concentrates on ARM cores widely used in the embedded industry. Most promising implementation choices for the common ARM Instruction Set Architecture (ISA) are identified, and a new implementation for the linear mixing layer is proposed. The performance improvement over current implementations is demonstrated by a case study on the Intel Strong ARM SA-1110 Microprocessor.

Published in:

Recent Advances in Information Technology (RAIT), 2012 1st International Conference on

Date of Conference:

15-17 March 2012