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A Junctionless Nanowire Transistor With a Dual-Material Gate

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7 Author(s)
Haijun Lou ; School of Computer and Information Engineering, Shenzhen Graduate School, Peking University, Shenzhen, China ; Lining Zhang ; Yunxi Zhu ; Xinnan Lin
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A dual-material-gate junctionless nanowire transistor (DMG-JNT) is proposed in this paper. Its characteristic is demonstrated and compared with a generic single-material-gate JNT using 3-D numerical simulations. The results show that the DMG-JNT has a number of desirable features, such as high ON-state current, a large ON/OFF current ratio, improved transconductance Gm, high unity-gain frequency fT, high maximum oscillation frequency fMAX, and reduced drain-induced barrier lowering. The effects of different control gate ratios Ra and varied work-function differences between the two gates are studied. Finally, the optimization of Ra and the work-function difference for the proposed DMG-JNT is presented.

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IEEE Transactions on Electron Devices  (Volume:59 ,  Issue: 7 )