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This paper proposes a dual-exposure single-capture wide dynamic-range (DR) CMOS image sensor (CIS) for optical identification systems. The proposed sensor achieves columnwise highly/lowly illuminated pixel detection, and only the “adequate” voltage signal (long- or short-exposure signal) is digitized. With an integrated highly/lowly illuminated pixel detection function in the columnwise single-slope (SS) ADC, each pixel is read out only once with highly or lowly illuminated pixel index for synthesis of a wide DR frame. This approach can dramatically reduce power dissipation compared to existing multiframe-readout solutions. The DR expansion ratio is programmable and depends on the time ratio of long- to short-exposure periods. A 160 × 140 wide DR CIS chip with the proposed SS ADC was fabricated using 0.18-μm CIS technology. This chip achieves a sensitivity of 5.33 V/lx · s and a noise floor of 0.29% of full swing (73e-) at 60 fps. The measured DR is 91 dB with a 40-dB boost by setting the exposure time ratio as 100. The resulting DNL is +0.16/ - 0.24 LSB, and the column-fixed-pattern noise is about 0.16%.